_origen.standard_sub_blocks.arm_debug#

Classes#

  • ArmDebug: Controller connecting the origen.blocks.arm_debug.controller.Controller view

  • DP:

  • JtagDP:

  • MemAP:

class _origen.standard_sub_blocks.arm_debug.ArmDebug#

Controller connecting the origen.blocks.arm_debug.controller.Controller view with the backend model. The controller here is responsible for instantiating and initializing the ArmDebug model.

add_mem_ap(name, ap=None, csw_reset=None)#
classmethod model_init(instance, block_options=None)#
switch_to_swd()#
class _origen.standard_sub_blocks.arm_debug.DP#
classmethod model_init(instance, block_options=None)#
power_up()#
verify_powered_up()#
verify_register(bits, **_verify_opts)#
write_register(bits, **_write_opts)#
class _origen.standard_sub_blocks.arm_debug.JtagDP#
classmethod model_init(instance, block_options=None)#
verify_register(bits, **verify_opts)#
write_register(bits, **write_opts)#
class _origen.standard_sub_blocks.arm_debug.MemAP#
capture_register(bits, **capture_opts)#
classmethod model_init(instance, block_options=None)#
verify_register(bits, **verify_opts)#
write_register(bits, **write_opts)#

Initiates an ArmDebug MemAP write based on the given register (passed in as a BitCollection). Assumes that all posturing has been completed - that is, the bits’ data, overlay status, etc. is current.