Device Modeling

The device model is the shared source of truth for DUT structure, registers, pins, and timing. Patterns and test-program interfaces operate on this model rather than duplicating tester-specific descriptions.

Model source belongs under the application’s blocks/ tree. A target selects and instantiates the top-level DUT; block files then contribute attributes, sub-blocks, registers, pins, services, and timing. Derivative directories extend or override a reusable parent model.

The following pages build the model from its structural foundation outward.

• Basics
  • Block Source Layout
  • Targets Instantiate Models
  • Inheritance And Derivatives
  • Modeling Guidelines
• Hierarchy
  • Top-Level
  • SubBlocks
    • Plugin Blocks
  • Paths And Addressing
  • Controllers
  • Validation Checklist
• Bits And Registers
  • Bits
  • Registers
    • Simple Registers
    • Fields
    • Reset Values
    • Memory Maps And Address Blocks
    • Transactions
    • Testing
• Pins
  • Defining Pins
  • Aliases
  • Pin Headers
  • Actions And State
  • Derivatives
  • Testing
• Timesets
  • Simple Timesets
  • Wavetables And Waves
  • Clock Waves
  • Symbol Maps
  • Tester Translation
  • Testing