Tag: v0.22.1

Branch: ‘master’
by Paul DeRouen on 03-Feb-2020 07:42AM

Update write_ir to behave the same for all testers

Tag: v0.22.0

Branch: ‘master’
by Paul DeRouen on 12-Jun-2019 08:23AM

Moves pin validation to run time. Makes tdo_store_cycle and tdo_strobe accessors.

Tag: v0.21.1

Branch: ‘master’
by Paul DeRouen on 25-Apr-2019 07:46AM

added alias method :tclk_cycle

Tag: v0.21.0

Branch: ‘master’
by Stephen McGinty on 23-Apr-2019 11:52AM
  • Added a new custom JTAG cycle hook to allow applications to define how JTAG cycles are implemented at the pin-level
  • Updated all documentation and internal code to reference TCK instead of TCLK, though in all cases the TCLK versions of pin names and options are still supported
  • Cleaned up documentation

Tag: v0.20.0

Branch: ‘master’
by Stephen McGinty on 07-Mar-2019 10:40AM

Now adds the necessary meta data during a read transaction to enable OrigenSim to resolve the actual read data in the event of a failed register read.

Tag: v0.19.1

Branch: ‘master’
by nxa18793 on 28-Jun-2018 06:27AM

Added tclk_multiple reader

Tag: v0.19.0

Branch: ‘master’
by Stephen McGinty on 01-Jun-2018 14:49PM

Adds the ability to override the conventional ‘1’ and ‘0’ drive values on the TCK pin via the following new configuration option:

# My V93K timing setup uses 'P' to enable a clock pulse instead of '1'
tclk_vals: { on: 'P', off: 0 }

This is primarily added to support a V93K-style timing setup whereby the clk pin on is defined via a wave called ‘P’ or similar, instead of ‘1’.

Tag: v0.18.0

Branch: ‘master’
by nxa18793 on 19-Apr-2018 07:22AM

sub_block instantiation support and flexibility in pin names

Tag: v0.17.2

Branch: ‘master’
by nxa18793 on 14-Mar-2018 07:29AM

bug fix for digsrc digcap overlay (MSB previously lost)

Tag: v0.17.1

Branch: ‘master’
by FSL\b04525 on 18-Oct-2017 10:17AM

fix overlay bugs introduced with origen_testers >= 0.10.0 < 0.13.2

Tag: v0.17.0

Branch: ‘master’
by Lajaunie Ronald-B01784 on 26-Sep-2017 10:29AM
  • Allow ‘mask’ option to drop through to the bit_collection.read

Tag: v0.16.0

Branch: ‘master’
by pderouen on 06-Sep-2017 11:52AM

added support for tester handled overlay added bit masking support for read while write operation

Tag: v0.15.0

Branch: ‘master’
by Lajaunie Ronald-B01784 on 28-Apr-2017 09:35AM
  • Patch bug in last release that lost store information of last bit when using shift_dr method

Tag: v0.14.0

Branch: ‘master’
by Lajaunie Ronald-B01784 on 28-Mar-2017 08:45AM
  • Ability to compare ‘out’ data on writes and specify ‘in’ data on reads (see web doc for API details).
  • Resolved Issue#1: tdo_store_cycle not working.
  • Updated to latest origen plugin structure (environment, boot, maillists, and lib/_dev).
  • Added spec file for more coverage.

Tag: v0.13.0

Branch: ‘master’
by Stephen McGinty on 10-Feb-2017 09:06AM
  • Added on_jtag_state_change callback, see homepage for example
  • Removed low level state change comments by default, noticed that these were causing fewer repeats to be generated on Teradyne. They can be enabled by setting log_state_changes to true on the driver directly or in the JTAG_CONFIG hash
  • Disabled inline_comments in the development environment V93K setup, these don’t diff well with tkdiff

Tag: v0.13.0.pre1

Branch: ‘master’
by Daniel Hadad on 20-Oct-2016 16:56PM


Tag: v0.13.0.pre0

Branch: ‘master’
by Daniel Hadad on 18-Oct-2016 13:41PM

Updated to support non-subroutine type overlays if tester supports labels to permit this. Mainly for UltraFLEX non-subroutine overlay support.

Tag: v0.12.1

Branch: ‘master’
by Stephen McGinty on 07-Oct-2016 04:18AM

Improved pattern comments

Tag: v0.12.0

Branch: ‘master’
by Stephen McGinty on 20-Jul-2015 08:35AM

Initial open source release for Origen

Tag: v0.11.0.pre5

Branch: ‘Trunk’
by Corey Engelken on 12-Jun-2015 16:17PM

Added an ‘arm_debug_comment’ option that will be printed in the pattern just before the data is shifted in. Small bugfix for arm_debug_overlays.

Tag: v0.11.0.pre4

Branch: ‘Trunk’
by Corey Engelken on 21-May-2015 09:13AM

Added an additional check-for-not-fixnum during arm-debug overlays. Updated gemspec to use newer version of RGen (was pre48).

Tag: v0.11.0.pre3

Branch: ‘Trunk’
by Jiang Liu on 12-Feb-2015 20:49PM

patched in the 3 lines of overlay code that was supposed to be updated in the previous patch.

Tag: v0.11.0.pre2

Branch: ‘Trunk’
by Jiang Liu on 06-Feb-2015 16:43PM

Based on discussion with Corey, updated previously known as options[:overlay] to options[:arm_debug_overlay], this is causing a naming conflict between arm_debug and nexus. This is just a temporary workaround for everyone, in the future this will be reworked.

Tag: v0.11.0.pre1

Branch: ‘Trunk’
by Jiang Liu on 06-Feb-2015 11:52AM

add addtional overlay options for write_dr method

Tag: v0.11.0.pre0

Branch: ‘Trunk’
by Corey Engelken on 30-Dec-2014 11:41AM

Added options to enable arm-debug (which tears apart the registers) to correctly use overlays and asserts (from reads).

Tag: v0.10.1

Branch: ‘Trunk’
by Daniel Hadad on 11-Dec-2014 14:02PM

Rename gem to ‘rgen_jtag’ as there were conflicts with public gem named ‘jtag’. Added code (commented out) to permit using local/unreleased gem. Updated to support rgen_core v2.5.0.pre18.

Tag: v0.10.0

Branch: ‘Trunk’
by Daniel Hadad on 05-Dec-2014 14:15PM

Updated to be a gem, per rgen 2.4.0 upgrade.

Tag: v0.9.2

Branch: ‘Trunk’
by Stephen McGinty on 13-Nov-2014 06:37AM

Bug fix: If an application disabled compares on TDO ($tester.ignore_fails($dut.pin(:tdo) do..) then this was not implemented by the JTAG driver and in fact it would actually remove the suspend on that pin that had been set by the application.

Added test case for this and the necessary patch to fix it.

Tag: v0.9.1

Branch: ‘Trunk’
by Stephen McGinty on 18-Aug-2014 08:38AM

Made the options argument to Driver#read_dr and Driver#read_ir optional as is the case with the equivalent write methods.

Bumped the min RGen version to pick up a fix for an error caused by bit index references to bits that are not present. i.e. on some RGen versions reg[10] where 10 does not exist will raise an error whereas this driver is coded to expect it to return nil.

Tag: v0.9.0.dev0

Branch: ‘Trunk’
by Yingpeng Kang on 30-Jun-2014 16:26PM

Added accessor tclk_format

Tag: v0.9.0

Branch: ‘Trunk’
by Daniel Hadad on 14-Mar-2014 17:07PM

Added tdo_store_cycle JTAG_CONFIG option to permit specifying which vector to store in multi-cycle TCK format.

Tag: v0.8.0

Branch: ‘Trunk’
by Daniel Hadad on 24-Feb-2014 17:01PM

Added tdo_strobe JTAG_CONFIG option to permit only strobing TDO when TCK is high for when TCK is greater than 1 tester cycle. Options also include when TCK is low and for all cycles of TCK.

Tag: v0.7.1

Branch: ‘Trunk’
by Daniel Hadad on 20-Feb-2014 15:41PM

Corrected JTAG shift method to use TCK formatting properly.

Tag: v0.7.0

Branch: ‘Trunk’
by Daniel Hadad on 19-Feb-2014 11:53AM

Added ability to modify TCLK timing format and the # of cycles TCLK spans for cases where TCLK needs to run at a fraction of another clock pin.

Assumes 50% duty cycle.

To use update JTAG_CONFIG in DUT model, e.g.

    :tclk_format => :rl,
    :tclk_multiple => 4

Default is tclk_format = :rh and tclk_multiple = 1

Tag: v0.6.1

Branch: ‘Trunk’
by Stephen McGinty on 19-Feb-2014 02:55AM

Fixed cases of driving/asserting nil values on a pin which latest RGen doesn’t like.

Added release validation (ensure tests pass).

Tag: v0.6.0

Branch: ‘Trunk’
by Stephen McGinty on 18-Dec-2013 08:31AM

Added integration with a tester supporting JTAG. If the tester model provides read/write_dr/ir methods then these will be deferred to to handle the requested actions.

In short this means that any apps using a JTAG-based protocol can generate protocol aware or bench patterns by simply using a tester model that implements these methods.

Tag: v0.5.1

Branch: ‘Trunk’
by Stephen McGinty on 02-Sep-2013 09:44AM

Bug fix to remove extra vector in a shift sequence when a full-width register is overlaid.

Tag: v0.5.0

Branch: ‘Trunk’
by Daniel Hadad on 28-Aug-2013 17:16PM

Added reset method to tap controller. Can pass message as option to read/write_ir/dr methods that gets put as comment in pattern.

Tag: v0.4.0

Branch: ‘Trunk’
by Stephen McGinty on 28-Aug-2013 06:28AM

Can now accept RGen::Registers::Container instances in place of regular register objects.

Tag: v0.3.0

Branch: ‘Trunk’
by Stephen McGinty on 22-Aug-2013 06:16AM

Added min/max RGen versions in place of fixed version. This should not have to change for a long time unless a dependency on a future RGen is added.

Tag: v0.2.0

Branch: ‘Trunk’
by Stephen McGinty on 21-Aug-2013 09:24AM

Overlay bits will now be generated in-line rather than generating sub-routine calls whenever RGen.mode.simulation? is true.

Added tracking of the IR register value and vectors from repeated calls to the write_ir method with the same value will now be inhibited. Originally it was envisaged that higher level wrappers would take care of this but on reflection this is probably not viable since there may be multiple protocols using the same physical JTAG and therefore it is better tracked at the lowest level.

This change means that higher level libraries can pre-fix all of their operations with a write to the IR with the value they need and the JTAG driver will take care of keeping the vectors optimal.

This version depends on RGen >= v2.0.1.dev98.

Tag: v0.1.0

Branch: ‘Trunk’
by Stephen McGinty on 12-Aug-2013 06:31AM

Major API update and internal simplification. Removed all local tracking of IR and DR registers states, that should be done by higher level wrappers. See here for full details of the new API: https://rgen.freescale.net/jtag

Tag: v0.0.0.dev1

Branch: ‘Trunk’
by Stephen McGinty on 09-Jul-2013 05:15AM

Removed illegal references to global objects ($soc, $tester, etc.) and added check that the parent implements the required pins.

Tag: v0.0.0.dev0

Branch: ‘Trunk’
by Stephen McGinty on 03-Jul-2013 08:29AM

Initial version, extracted from C90TFS NVM app, probably doesn’t work