Module: OrigenDebuggers::JLink::JTAG_API

Included in:
OrigenDebuggers::JLink
Defined in:
lib/origen_debuggers/j_link.rb

Overview

If the debugger supports JTAG definitely add these methods, this provides instant compatibility with any application that uses a JTAG based protocol

Instance Method Summary collapse

Instance Method Details

#read_dr(reg_or_val, options = {}) ⇒ Object

Read the given value, register or bit collection from the data register



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# File 'lib/origen_debuggers/j_link.rb', line 352

def read_dr(reg_or_val, options = {})
  # Can't read the DR via J-Link
end

#read_ir(reg_or_val, options = {}) ⇒ Object

Read the given value, register or bit collection from the instruction register



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# File 'lib/origen_debuggers/j_link.rb', line 367

def read_ir(reg_or_val, options = {})
  # Can't read the IR via J-Link
end

#write_dr(reg_or_val, options = {}) ⇒ Object

Write the given value, register or bit collection to the data register



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# File 'lib/origen_debuggers/j_link.rb', line 337

def write_dr(reg_or_val, options = {})
  if reg_or_val.respond_to?(:data)
    data = reg_or_val.data
    size = options[:size] || reg_or_val.size
  else
    data = reg_or_val
    size = options[:size]
  end
  dw "wjd 0x#{data.to_s(16).upcase}, #{size}\nc"  # the extra clock cycle is needed here to opperate correctly on certain devices
  # the added clock cycle means that the JLink opperation matches the atp tester opperation (J750 etc)
  # some devices may function without the addition, however an extra clock cycle in "run-Test/idle" is unlikely to
  # break anything so has been added universally.
end

#write_ir(reg_or_val, options = {}) ⇒ Object

Write the given value, register or bit collection to the instruction register



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# File 'lib/origen_debuggers/j_link.rb', line 357

def write_ir(reg_or_val, options = {})
  if reg_or_val.respond_to?(:data)
    data = reg_or_val.data
  else
    data = reg_or_val
  end
  dw "wjc 0x#{data.to_s(16).upcase}"
end