Class: OrigenARM::Cores::CortexM::Base

Inherits:
Base
  • Object
show all
Includes:
Origen::Model, Registers
Defined in:
lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb,
lib/origen_arm/cores/cortexm/base_cortexm/cortexm_registers.rb

Direct Known Subclasses

CM33

Defined Under Namespace

Modules: Registers

Instance Attribute Summary collapse

Instance Method Summary collapse

Methods included from Registers

instantiate_core_registers, instantiate_registers

Constructor Details

#initialize(options = {}) ⇒ Base

Note:

For the most part, enter/exit debug mode delay cycles should be the same, so the same override will affect both. For these to be truely different, both options must be given.

Initialize the CortexM base.

Parameters:

  • options (Hash) (defaults to: {}) —

    CortexM Base options.

Options Hash (options):

  • :no_init_common_registers (True, False) —

    Skip initializing common registers entirely.

  • :enter_debug_mode_delay_cycles (Fixnum) —

    Customize the delay (in cycles) to wait for the device to enter debug mode.

  • :exit_debug_mode_delay_cycles (Fixnum) —

    Customize the delay (in cycles) to wait for the device to exit debug mode.



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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 25

def initialize(options={})
  # Initialize any common registers followed by the core's own registers.
  # Note that the core's #initialize_registers could re-configure or
  # remove any common registers that aren't actually common to that core.
  OrigenARM::Cores::CortexM::Base::Registers.instantiate_registers(self, options) unless options[:no_init_common_registers]
  instantiate_registers(options) if respond_to?(:instantiate_registers)
  
  @enter_debug_mode_delay_cycles = options[:enter_debug_mode_delay_cycles] || options[:exit_debug_mode_delay_cycles]  || 50
  @exit_debug_mode_delay_cycles  = options[:exit_debug_mode_delay_cycles]  || options[:enter_debug_mode_delay_cycles] || 50
  
  @write_debug_register_delay = options[:write_debug_register_delay] || 1000
  @read_debug_register_delay  = options[:read_debug_register_delay]  || 1000
  
  super
end

Instance Attribute Details

#enter_debug_mode_delay_cycles ⇒ Object (readonly)

Returns the value of attribute enter_debug_mode_delay_cycles



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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 10

def enter_debug_mode_delay_cycles
  @enter_debug_mode_delay_cycles
end

#exit_debug_mode_delay_cycles ⇒ Object (readonly)

Returns the value of attribute exit_debug_mode_delay_cycles



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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 11

def exit_debug_mode_delay_cycles
  @exit_debug_mode_delay_cycles
end

#read_debug_register_delay ⇒ Object (readonly)

Returns the value of attribute read_debug_register_delay



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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 13

def read_debug_register_delay
  @read_debug_register_delay
end

#write_debug_register_delay ⇒ Object (readonly)

Returns the value of attribute write_debug_register_delay



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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 12

def write_debug_register_delay
  @write_debug_register_delay
end

Instance Method Details

#_registers_scope ⇒ Module

Returns the location of the Registers module.

Examples:

Retrieve the register scope of the CM33 core model.

dut.cm33_core._registers_scope #=> OrigenARM::Cores::CortexM::CM33::Registers

Returns:

  • (Module) 


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# File 'lib/origen_arm/cores/cortexm/base_cortexm/cortexm.rb', line 45

def _registers_scope
  eval("#{self.class.to_s}::Registers")
end